Techniques for sensing data states of respective memory cells in a memory array are provided, the memory array including at least a first bit line coupled to at least a subset of the memory cells. In one aspect, a circuit for sensing data states of respective memory cells in the memory array includes at least one sense amplifier coupled to the first bit line. The sense amplifier includes a first transistor operative to selectively inhibit charging of the first bit line in a manner which is independent of a voltage level on a second bit line coupled to the sense amplifier.