Invention Grant
- Patent Title: Selectively powered retirement unit using a partitioned allocation array and a partitioned writeback array
- Patent Title (中): 使用分区分配阵列和分区回写阵列的选择性供电退出单元
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Application No.: US12215526Application Date: 2008-06-27
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Publication No.: US07921280B2Publication Date: 2011-04-05
- Inventor: Zeev Sperber , Rafi Marom , Ofer Levy
- Applicant: Zeev Sperber , Rafi Marom , Ofer Levy
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F9/30
- IPC: G06F9/30
Abstract:
In one embodiment, the present invention includes a retirement unit to receive and retire executed instructions. The retirement unit may include a first array to receive information at allocation and a second array to receive information after execution. The retirement unit may further include logic to calculate an event associated with an executed instruction if information associated with the executed instruction is stored in an on-demand portion of at least one of arrays. Other embodiments are described and claimed.
Public/Granted literature
- US20090327663A1 Power Aware Retirement Public/Granted day:2009-12-31
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