Invention Grant
- Patent Title: Scheduling processor voltages and frequencies based on performance prediction and power constraints
- Patent Title (中): 基于性能预测和功率约束调度处理器电压和频率
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Application No.: US12105206Application Date: 2008-04-17
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Publication No.: US07921313B2Publication Date: 2011-04-05
- Inventor: Soraya Ghiasi , Thomas Walter Keller, Jr. , Ramakrishna Kotla , Freeman Leigh Rawson, III
- Applicant: Soraya Ghiasi , Thomas Walter Keller, Jr. , Ramakrishna Kotla , Freeman Leigh Rawson, III
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yee & Associates, P.C.
- Agent Libby Z. Toub
- Main IPC: G06F1/26
- IPC: G06F1/26
Abstract:
A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.
Public/Granted literature
- US20080209243A1 Scheduling processor voltages and frequencies based on performance prediction and power constraints Public/Granted day:2008-08-28
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