Invention Grant
US07921331B2 Write filter cache method and apparatus for protecting the microprocessor core from soft errors
有权
用于保护微处理器内核免受软错误的写入过滤器高速缓存方法和装置
- Patent Title: Write filter cache method and apparatus for protecting the microprocessor core from soft errors
- Patent Title (中): 用于保护微处理器内核免受软错误的写入过滤器高速缓存方法和装置
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Application No.: US12138099Application Date: 2008-06-12
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Publication No.: US07921331B2Publication Date: 2011-04-05
- Inventor: Pradip Bose , Zhigang Hu , Xiaodong Li , Jude A. Rivers
- Applicant: Pradip Bose , Zhigang Hu , Xiaodong Li , Jude A. Rivers
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Louis J. Percello, Esq.
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/08

Abstract:
A write filter cache system for protecting a microprocessor core from soft errors and method thereof are provided. In one aspect, data coming from a processor core to be written in primary cache memory, for instance, L1 cache memory system, is buffered in a write filter cache placed between the primary cache memory and the processor core. The data from the write filter is move to the main cache memory only if it is verified that main thread's data is soft error free, for instance, by comparing the main thread's data with that of its redundant thread. The main cache memory only keeps clean data associated with accepted checkpoints.
Public/Granted literature
- US20080244186A1 WRITE FILTER CACHE METHOD AND APPARATUS FOR PROTECTING THE MICROPROCESSOR CORE FROM SOFT ERRORS Public/Granted day:2008-10-02
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