Invention Grant
US07921341B2 System and method for reproducing memory error 有权
用于再现内存错误的系统和方法

  • Patent Title: System and method for reproducing memory error
  • Patent Title (中): 用于再现内存错误的系统和方法
  • Application No.: US12033231
    Application Date: 2008-02-19
  • Publication No.: US07921341B2
    Publication Date: 2011-04-05
  • Inventor: Takashi Abe
  • Applicant: Takashi Abe
  • Applicant Address: JP Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JP Tokyo
  • Priority: JP2007-044527 20070223
  • Main IPC: G11C29/00
  • IPC: G11C29/00
System and method for reproducing memory error
Abstract:
An information processing apparatus includes a nonvolatile memory area having a storage area, and a main controller configured to store an access pattern to a main memory in the nonvolatile memory area, to end the storage of the access pattern when an error is detected in the main memory, and to access the main memory based on the access pattern stored in the nonvolatile memory area. The main controller includes a main memory control unit configured to access the main memory based on the access pattern; a nonvolatile memory control unit configured to store a data of the access pattern in the nonvolatile memory area; and a main control unit configured to transfer the access pattern for the main memory to the main memory control unit and the nonvolatile memory control unit.
Public/Granted literature
Information query
Patent Agency Ranking
0/0