Invention Grant
US07923315B2 Manufacturing method for planar independent-gate or gate-all-around transistors
有权
平面独立栅极或栅极全环晶体管的制造方法
- Patent Title: Manufacturing method for planar independent-gate or gate-all-around transistors
- Patent Title (中): 平面独立栅极或栅极全环晶体管的制造方法
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Application No.: US12809876Application Date: 2008-12-18
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Publication No.: US07923315B2Publication Date: 2011-04-12
- Inventor: Arnaud Pouydebasque , Philippe Coronel , Stephanne Denorme
- Applicant: Arnaud Pouydebasque , Philippe Coronel , Stephanne Denorme
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP07291587 20071221
- International Application: PCT/IB2008/055418 WO 20081218
- International Announcement: WO2009/081345 WO 20090702
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84

Abstract:
The present invention relates to a method for fabricating a planar independent-double-gate FET or a planar gate-all-around FET on a bulk semiconductor substrate. The method comprises refilling a surface recess in an active semiconductor region with a buried sacrificial layer, and, after preparing a pre-processing a gate stack by respective deposition and patterning, the formation of a recess in the isolation regions so as to cause the recess to extend, in a depth direction that points towards the inner substrate, to a depth level that allows removing the buried sacrificial layer and so as to cause the recess to undercut portions of gate stack in the channel direction.
Public/Granted literature
- US20110014769A1 MANUFACTURING METHOD FOR PLANAR INDEPENDENT-GATE OR GATE-ALL-AROUND TRANSISTORS Public/Granted day:2011-01-20
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