Invention Grant
- Patent Title: Method for manufacturing a semiconductor integrated circuit device circuit device
- Patent Title (中): 半导体集成电路器件电路器件的制造方法
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Application No.: US12622524Application Date: 2009-11-20
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Publication No.: US07923319B2Publication Date: 2011-04-12
- Inventor: Takuya Futase , Shuhei Murata , Takeshi Hayashi
- Applicant: Takuya Futase , Shuhei Murata , Takeshi Hayashi
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2008-300439 20081126
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
When a natural oxide film is left at the interface between a metal silicide layer and a silicon nitride film, in various heating steps (steps involving heating of a semiconductor substrate, such as various insulation film and conductive film deposition steps) after deposition of the silicon nitride film, the metal silicide layer partially abnormally grows due to oxygen of the natural oxide film occurring on the metal silicide layer surface. A substantially non-bias (including low bias) plasma treatment is performed in a gas atmosphere containing an inert gas as a main component on the top surface of a metal silicide film of nickel silicide or the like over source/drain of a field-effect transistor forming an integrated circuit. Then, a silicon nitride film serving as an etching stop film of a contact process is deposited. As a result, without causing undesirable cutting of the metal silicide film, the natural oxide film over the top surface of the metal silicide film can be removed.
Public/Granted literature
- US20100129974A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE CIRCUIT DEVICE Public/Granted day:2010-05-27
Information query
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