Invention Grant
- Patent Title: SONOS memory device with optimized shallow trench isolation
- Patent Title (中): SONOS存储器件具有优化的浅沟槽隔离
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Application No.: US11575302Application Date: 2005-09-13
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Publication No.: US07923363B2Publication Date: 2011-04-12
- Inventor: Pierre Goarin , Robertus Theodorus Fransiscus Van Schaijk
- Applicant: Pierre Goarin , Robertus Theodorus Fransiscus Van Schaijk
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP04104455 20040915
- International Application: PCT/IB2005/052997 WO 20050913
- International Announcement: WO2006/030380 WO 20060323
- Main IPC: H01L21/3205
- IPC: H01L21/3205

Abstract:
Method of manufacturing a non-volatile memory device on a semiconductor substrate in a memory area, said non-volatile memory device comprising a cell stack of a first semiconductor layer, a charge trapping layer and an electrically conductive layer, the charge trapping layer being the intermediate layer between the first semiconductor layer and the electrically conductive layer, the charge trapping layer comprising at least a first insulating layer; the method comprising: —providing the substrate having the first semiconductor layer; —depositing the charge trapping layer; —depositing the electrically conductive layer; —patterning the cell stack to form at least two non-volatile memory cells, and —creating a shallow trench isolation in between said at least two non-volatile memory cells.
Public/Granted literature
- US20090212347A1 SONOS MEMORY DEVICE WITH OPTIMIZED SHALLOW TRENCH ISOLATION Public/Granted day:2009-08-27
Information query
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