Invention Grant
US07923806B2 Embedded wiring in copper damascene with void suppressing structure
有权
铜镶嵌嵌入式布线,具有空隙抑制结构
- Patent Title: Embedded wiring in copper damascene with void suppressing structure
- Patent Title (中): 铜镶嵌嵌入式布线,具有空隙抑制结构
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Application No.: US11084014Application Date: 2005-03-21
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Publication No.: US07923806B2Publication Date: 2011-04-12
- Inventor: Kenichi Watanabe
- Applicant: Kenichi Watanabe
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Main IPC: H01L29/00
- IPC: H01L29/00

Abstract:
A semiconductor device capable of restricting a void growth in a copper wiring. The semiconductor device comprises a semiconductor substrate, an insulation layer formed above the semiconductor substrate, a barrier metal layer that is a first damascene wiring buried in the insulation layer, defines the bottom face and the side faces, and also defines a first hollow part at the inner side, a copper wiring layer disposed in the first hollow part and defining a second hollow part at the inner side, a first damascene wiring disposed in the second hollow part and containing an auxiliary barrier metal layer separated from the barrier metal layer, and an insulating copper diffusion preventing film disposed on the first damascene wiring and the insulation layer.
Public/Granted literature
- US20050161825A1 Semiconductor device Public/Granted day:2005-07-28
Information query
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