Invention Grant
- Patent Title: Integrated circuit package
- Patent Title (中): 集成电路封装
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Application No.: US12553919Application Date: 2009-09-03
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Publication No.: US07923825B2Publication Date: 2011-04-12
- Inventor: Jaime A. Bayan , Anindya Poddar
- Applicant: Jaime A. Bayan , Anindya Poddar
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Heyer Law Group LLP
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
An integrated circuit package is described that includes an integrated circuit die, a plurality of lower contact leads, and an insulating substrate positioned over the die and lower contact leads. The insulating substrate includes a plurality of electrically conducting upper routing traces formed on the bottom surface of the substrate. The traces on the bottom surface of the substrate electrically couple each lower contact lead with an associated I/O pad.
Public/Granted literature
- US20100025818A1 INTEGRATED CIRCUIT PACKAGE Public/Granted day:2010-02-04
Information query
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