Invention Grant
US07924022B2 Evaluation board and failure location detection method 有权
评估板和故障定位检测方法

Evaluation board and failure location detection method
Abstract:
An evaluation board, on which is mounted a chip to be evaluated is provided. Particularly, the evaluation board includes a monitoring window for monitoring a power supply part, a ground part, and a surface of the chip, a first signal input part for inputting signals to the chip, and a second signal input part for inputting signals to the chip, wherein the second signal input part is placed as to sandwich said monitoring window between itself and the first signal input part.
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