Invention Grant
- Patent Title: Negative analog switch design
- Patent Title (中): 负模拟开关设计
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Application No.: US12488287Application Date: 2009-06-19
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Publication No.: US07924085B2Publication Date: 2011-04-12
- Inventor: Dianbo Guo
- Applicant: Dianbo Guo
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
- Current Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent Lisa K. Jorgenson; Andre M. Szuwalski
- Main IPC: H03K3/01
- IPC: H03K3/01

Abstract:
A transmission gate includes first and second MOS transistors of opposite conductivity type coupled in parallel with each other. Each transistor includes a body connection that is separately biased by corresponding first and second biasing circuits. The first biasing circuit generates a first bias voltage having a voltage level that is generated as a function of the signal at the first node and a first (for example, positive) reference voltage. The second biasing circuit generates a second bias voltage having a voltage level that is generated as a function of the signal at the first node and a second (for examples ground) reference voltage.
Public/Granted literature
- US20100321100A1 NEGATIVE ANALOG SWITCH DESIGN Public/Granted day:2010-12-23
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