Invention Grant
US07925837B2 Maintaining write cache and parity update footprint coherency in multiple storage adaptor configuration
失效
在多个存储适配器配置中维护写入缓存和奇偶校验更新足迹一致性
- Patent Title: Maintaining write cache and parity update footprint coherency in multiple storage adaptor configuration
- Patent Title (中): 在多个存储适配器配置中维护写入缓存和奇偶校验更新足迹一致性
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Application No.: US12041807Application Date: 2008-03-04
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Publication No.: US07925837B2Publication Date: 2011-04-12
- Inventor: Joseph Roger Edwards , Robert Edward Galbraith , Adrian Cuenin Gerhard , Timothy James Larson , William Joseph Maitland, Jr.
- Applicant: Joseph Roger Edwards , Robert Edward Galbraith , Adrian Cuenin Gerhard , Timothy James Larson , William Joseph Maitland, Jr.
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Rabin & Berdo, PC
- Main IPC: G06F13/14
- IPC: G06F13/14
Abstract:
A method, computer program product and computer system for maintaining write cache and parity update footprint coherency in a multiple storage adaptor configuration for storage adaptors in a storage subsystem, which includes providing atomic updating of the storage adaptors and the attached disk drives, enabling runtime addition and runtime subtraction of a storage adaptor in the multiple storage adaptor configuration, and maintaining write cache and parity update footprint coherency using atomic updating, runtime addition and runtime subtraction of a storage adaptor.
Public/Granted literature
- US20090228646A1 Maintaining Write Cache and Parity Update Footprint Coherency in Multiple Storage Adaptor Configuration Public/Granted day:2009-09-10
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