Invention Grant
US07925869B2 Instruction-level multithreading according to a predetermined fixed schedule in an embedded processor using zero-time context switching
有权
根据使用零时上下文切换的嵌入式处理器中的预定固定调度的指令级多线程
- Patent Title: Instruction-level multithreading according to a predetermined fixed schedule in an embedded processor using zero-time context switching
- Patent Title (中): 根据使用零时上下文切换的嵌入式处理器中的预定固定调度的指令级多线程
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Application No.: US09748098Application Date: 2000-12-21
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Publication No.: US07925869B2Publication Date: 2011-04-12
- Inventor: Nicholas J Kelsey , Christopher J Waters , Tibet Mimaroglu , David A Fotland
- Applicant: Nicholas J Kelsey , Christopher J Waters , Tibet Mimaroglu , David A Fotland
- Applicant Address: US CA San Jose
- Assignee: Ubicom, Inc.
- Current Assignee: Ubicom, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Fenwick & West LLP
- Main IPC: G06F9/00
- IPC: G06F9/00
Abstract:
A system and method for enabling multithreading in a embedded processor, invoking zero-time context switching in a multithreading environment, scheduling multiple threads to permit numerous hard-real time and non-real time priority levels, fetching data and instructions from multiple memory blocks in a multithreading environment, and enabling a particular thread to modify the multiple states of the multiple threads in the processor core.
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