Invention Grant
US07925912B1 Method and apparatus for fine edge control on integrated circuit outputs
有权
用于集成电路输出的精细边缘控制的方法和装置
- Patent Title: Method and apparatus for fine edge control on integrated circuit outputs
- Patent Title (中): 用于集成电路输出的精细边缘控制的方法和装置
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Application No.: US11831554Application Date: 2007-07-31
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Publication No.: US07925912B1Publication Date: 2011-04-12
- Inventor: Roy G. Moss , Douglas G. Keithley , Richard N. Woolley
- Applicant: Roy G. Moss , Douglas G. Keithley , Richard N. Woolley
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/12 ; G06F19/00 ; G06F15/167 ; G06F3/00 ; G06F12/00 ; H03K19/00 ; H03K5/01 ; H03K21/00 ; H04L7/00

Abstract:
A device for adjusting the timing of at least one edge of an output pulse created in response to a reference pulse is disclosed. Such a device may include a first memory circuit having two or more first memory cells and a second memory circuit also having two or more second memory cells. The first memory circuit may be configured to periodically sample the reference pulse at the rising edges of a first sample clock while the second memory circuit may be configured to periodically sample the reference pulse at the falling edges of the first sample clock. A combinatorial logic circuit may also be included to produce the output pulse having at least one adjusted edge based on a set of timing instructions and timing information provided by the first and/or second memory circuits.
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