Invention Grant
- Patent Title: Test compaction using linear-matrix driven scan chains
- Patent Title (中): 使用线性矩阵驱动扫描链进行测试压实
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Application No.: US12549951Application Date: 2009-08-28
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Publication No.: US07925941B2Publication Date: 2011-04-12
- Inventor: Sandeep Bhatia
- Applicant: Sandeep Bhatia
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G01R31/28
- IPC: G01R31/28
Abstract:
A scan technique using linear matrix to drive scan chains is used, along with an ATPG, to constraint scan test vectors to be generated through the linear matrix. The linear matrix scan technique reduces the test application time and the amount of test vector data by several orders of magnitude over conventional techniques, without reducing fault coverage.
Public/Granted literature
- US20100058129A1 TEST COMPACTION USING LINEAR-MATRIX DRIVEN SCAN CHAINS Public/Granted day:2010-03-04
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