Invention Grant
US07925950B2 Implementing enhanced array access time tracking with logic built in self test of dynamic memory and random logic
有权
实现增强的阵列访问时间跟踪，内置动态内存和随机逻辑的自检逻辑
- Patent Title: Implementing enhanced array access time tracking with logic built in self test of dynamic memory and random logic
- Patent Title (中): 实现增强的阵列访问时间跟踪，内置动态内存和随机逻辑的自检逻辑
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Application No.: US12393156Application Date: 2009-02-26
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Publication No.: US07925950B2Publication Date: 2011-04-12
- Inventor: Todd Alan Christensen , Peter Thomas Freiburger , Jesse Daniel Smith
- Applicant: Todd Alan Christensen , Peter Thomas Freiburger , Jesse Daniel Smith
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Joan Pennington
- Main IPC: G01R31/28
- IPC: G01R31/28
Abstract:
A method and circuit for implementing substantially perfect array access time tracking with Logic Built In Self Test (LBIST) diagnostics of dynamic memory array and random logic, and a design structure on which the subject circuit resides are provided. The dynamic memory array is initialized to a state for the longest read time for each bit and the dynamic memory array is forced into a read only mode. During LBIST diagnostics with the array in the read only mode, the array outputs are combined with the data inputs to provide random switching data on the array outputs to the random logic.
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