Invention Grant
- Patent Title: Method of modifying vias connection of printed circuit boards
- Patent Title (中): 修改印刷电路板通孔连接的方法
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Application No.: US12140325Application Date: 2008-06-17
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Publication No.: US07925999B2Publication Date: 2011-04-12
- Inventor: Ying-Tso Lai , Chien-Hung Liu , Shou-Kuo Hsu
- Applicant: Ying-Tso Lai , Chien-Hung Liu , Shou-Kuo Hsu
- Applicant Address: TW Tu-Cheng, Taipei Hsien
- Assignee: Hon Hai Precision Industry Co., Ltd.
- Current Assignee: Hon Hai Precision Industry Co., Ltd.
- Current Assignee Address: TW Tu-Cheng, Taipei Hsien
- Agent D. Austin Bonderer
- Priority: CN200810301061 20080411
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A design method of printed circuit boards includes the following steps. First, simulate a printed circuit board including power layers, and vias connected to all the power layers. Then, change connections of the vias that tend to draw too much current to be connected to fewer power layers, than the vias that tend to draw less current. Repeat adjusting connections of the vias until all vias draw a similar amount of current such that no via draws more current than an upper limit the vias are designed for. Finally, according to the results, design/fabricate a PCB with vias respectively insulated, as needed, from the power layers that do not need to be connected to the vias.
Public/Granted literature
- US20090259984A1 METHOD OF PRINTED CIRCUIT BOARDS Public/Granted day:2009-10-15
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