Invention Grant
- Patent Title: Semiconductor memory device having reference transistor and method of manufacturing the same
- Patent Title (中): 具有参考晶体管的半导体存储器件及其制造方法
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Application No.: US11504689Application Date: 2006-08-16
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Publication No.: US07928491B2Publication Date: 2011-04-19
- Inventor: Masashi Nakata , Fumihiko Hayashi
- Applicant: Masashi Nakata , Fumihiko Hayashi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2006-095285 20060330
- Main IPC: H01L29/76
- IPC: H01L29/76

Abstract:
A semiconductor memory device has: a substrate; a memory cell transistor of a split-gate type formed on the substrate; and a reference transistor formed on the substrate and used for generating a reference current that is used in sensing data stored in the memory cell transistor. The memory cell transistor has a floating gate and a control gate, while the reference transistor is a MIS (Metal Insulator Semiconductor) transistor having a single gate electrode.
Public/Granted literature
- US20070228444A1 Semiconductor memory device having reference transistor and method of manufacturing the same Public/Granted day:2007-10-04
Information query
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