Invention Grant
- Patent Title: Nonvolatile semiconductor memory and manufacturing method thereof
- Patent Title (中): 非易失性半导体存储器及其制造方法
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Application No.: US11854845Application Date: 2007-09-13
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Publication No.: US07928497B2Publication Date: 2011-04-19
- Inventor: Toshitake Yaegashi
- Applicant: Toshitake Yaegashi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McCelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-254710 20060920
- Main IPC: H01L29/788
- IPC: H01L29/788

Abstract:
A nonvolatile semiconductor memory according to examples of the present invention comprises a memory cell and a peripheral transistor. The memory cell has a first intergate insulating film having a multilayer structure and provided on a floating gate electrode and an isolation insulating layer. The peripheral transistor has a second intergate insulating film having a multilayer structure and provided on a first gate electrode and a second isolation insulating layer. The first and second intergate insulating films have the same structure, and a lowermost insulating layer of the first intergate insulating film on the first isolation insulating layer is thinner than a lowermost insulating layer of the second intergate insulating film on the second isolation insulating layer.
Public/Granted literature
- US20080067576A1 NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF Public/Granted day:2008-03-20
Information query
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