Invention Grant
US07928578B2 Electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components 有权
在纳米电路结构和标准电子元件之间的半导体电子器件中的电连接

Electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components
Abstract:
A semiconductor electronic device that includes a semiconductor substrate having a top surface; a seed layer positioned on the substrate and having a notched wall extending transversely with respect to the substrate top surface, the wall defining a first recess extending into the seed layer with a height equal to a thickness of the seed layer; a first conductive nanowire in contact with the notched wall, the first conductive nanowire having a contact portion extending into the first recess and covering opposite sidewalls and a bottom of the first recess; a first insulating nanowire in contact with a sidewall of the first conductive nanowire; an insulating layer on the contact portion of the first conductive nanowire and having a first window substantially in correspondence with the contact portion of the first conductive nanowire; and a first conductive die on the insulating layer that includes a conductive contact extending into the first window and contacting the contact portion of the first conductive nanowire.
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