Invention Grant
US07930604B1 Apparatus and method for testing and debugging an integrated circuit
有权
用于集成电路测试和调试的装置和方法
- Patent Title: Apparatus and method for testing and debugging an integrated circuit
- Patent Title (中): 用于集成电路测试和调试的装置和方法
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Application No.: US12778225Application Date: 2010-05-12
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Publication No.: US07930604B1Publication Date: 2011-04-19
- Inventor: Saeed Azimi , Son Ho , Daniel Smathers
- Applicant: Saeed Azimi , Son Ho , Daniel Smathers
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A system for receiving serial messages from a device under test includes a deserializer configured to i) receive the serial messages and, ii) based on the serial messages, form data frames. A frame sync module is configured to form Joint Task Action Group (JTAG) data bits based on the data frames. A plurality of virtual JTAG test access ports are configured to i) receive the JTAG data bits and ii) shift the JTAG data bits between the plurality of virtual JTAG test access ports.
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