Invention Grant
US07932161B2 Methods and materials useful for chip stacking, chip and wafer bonding
有权
用于芯片堆叠，芯片和晶片接合的方法和材料
- Patent Title: Methods and materials useful for chip stacking, chip and wafer bonding
- Patent Title (中): 用于芯片堆叠，芯片和晶片接合的方法和材料
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Application No.: US11726354Application Date: 2007-03-21
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Publication No.: US07932161B2Publication Date: 2011-04-26
- Inventor: Chris Apanius , Robert A. Shick , Hendra Ng , Andrew Bell , Wei Zhang , Phil Neal
- Applicant: Chris Apanius , Robert A. Shick , Hendra Ng , Andrew Bell , Wei Zhang , Phil Neal
- Applicant Address: US OH Brecksville
- Assignee: Promerus LLC
- Current Assignee: Promerus LLC
- Current Assignee Address: US OH Brecksville
- Agency: The Webb Law Firm
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/46
Abstract:
Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
Public/Granted literature
- US20070232026A1 Methods and materials useful for chip stacking, chip and wafer bonding Public/Granted day:2007-10-04
Information query
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