Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof and encapsulating method thereof
- Patent Title (中): 半导体封装及其制造方法及封装方法
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Application No.: US12603271Application Date: 2009-10-21
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Publication No.: US07932617B2Publication Date: 2011-04-26
- Inventor: Chung-Yao Kao , Tsang-Hung Ou
- Applicant: Chung-Yao Kao , Tsang-Hung Ou
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Muncy, Geissler, Olds & Lowe, PLLC
- Priority: TW98122322A 20090701
- Main IPC: H01L23/28
- IPC: H01L23/28

Abstract:
A semiconductor package, a manufacturing method thereof and an encapsulating method thereof are provided. The semiconductor package includes a substrate, a flip chip, a plurality of conductive parts and a sealant. The substrate has a substrate upper surface. The flip chip has an active surface and a chip surface opposite to the active surface. The conductive parts electrically connect the substrate upper surface and the active surface. The sealant envelops the flip chip, and the space between the substrate upper surface and the active surface is filled with a portion of the sealant. The sealant further has a top surface. wherein, the chip surface is spaced apart from the top surface by a first distance, the substrate upper surface is spaced apart from the active surface by a second distance, and the ratio of the first distance to the second distance ranges from 2 to 5.
Public/Granted literature
- US20100213595A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF AND ENCAPSULATING METHOD THEREOF Public/Granted day:2010-08-26
Information query
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