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US07932752B2 Correlated double sampling circuit and sample hold circuit 有权
相关双采样电路和采样保持电路

Correlated double sampling circuit and sample hold circuit
Abstract:
A correlated double sampling circuit has a sampling capacitor equally divided into a plurality of portions. In the correlated double sampling circuit, an input signal is sampled at a plurality of sampling points and an averaging switch is closed to obtain an average value of a plurality of sampling values obtained by sampling. High frequency noise superimposed on the input signal is thus reduced and a difference between the average values of the plurality of sampling values obtained by sampling is output.
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