Invention Grant
- Patent Title: Correlated double sampling circuit and sample hold circuit
- Patent Title (中): 相关双采样电路和采样保持电路
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Application No.: US12090310Application Date: 2006-10-27
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Publication No.: US07932752B2Publication Date: 2011-04-26
- Inventor: Makoto Ohba
- Applicant: Makoto Ohba
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2005-323386 20051108
- International Application: PCT/JP2006/321548 WO 20061027
- International Announcement: WO2007/055114 WO 20070518
- Main IPC: G11C27/02
- IPC: G11C27/02 ; H03K5/00 ; H03K17/00

Abstract:
A correlated double sampling circuit has a sampling capacitor equally divided into a plurality of portions. In the correlated double sampling circuit, an input signal is sampled at a plurality of sampling points and an averaging switch is closed to obtain an average value of a plurality of sampling values obtained by sampling. High frequency noise superimposed on the input signal is thus reduced and a difference between the average values of the plurality of sampling values obtained by sampling is output.
Public/Granted literature
- US20090219058A1 CORRELATED DOUBLE SAMPLING CIRCUIT AND SAMPLE HOLD CIRCUIT Public/Granted day:2009-09-03
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