Invention Grant
- Patent Title: Wafer-level fabrication of lidded chips with electrodeposited dielectric coating
- Patent Title (中): 用电沉积电介质涂层的晶圆级制造带芯芯片
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Application No.: US11590616Application Date: 2006-10-31
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Publication No.: US07935568B2Publication Date: 2011-05-03
- Inventor: Vage Oganesian , David Ovrutsky , Charles Rosenstein , Belgacem Haba , Giles Humpston
- Applicant: Vage Oganesian , David Ovrutsky , Charles Rosenstein , Belgacem Haba , Giles Humpston
- Applicant Address: IE
- Assignee: Tessera Technologies Ireland Limited
- Current Assignee: Tessera Technologies Ireland Limited
- Current Assignee Address: IE
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50

Abstract:
A method is provided for fabricating a unit including a semiconductor element such as a sensor unit, e.g., for optical imaging. A semiconductor element has plurality of conductive features exposed at the front surface and semiconductive or conductive material exposed at least one of the front and rear surfaces. At least some of the conductive features are insulated from the exposed semiconductive or conductive material. By electrodeposition, an insulative layer is formed to overlie the at least one of exposed semiconductive material or conductive material. Subsequently, a plurality of conductive contacts and a plurality of conductive traces are formed overlying the electrodeposited insulative layer, the conductive traces connecting the conductive features to the conductive contacts. The unit can be incorporated in a camera module having an optical element in registration with an imaging area of the semiconductor element.
Public/Granted literature
- US20080099900A1 Wafer-level fabrication of lidded chips with electrodeposited dielectric coating Public/Granted day:2008-05-01
Information query
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