Invention Grant
US07935572B2 Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages
有权
半导体多封装模块具有封装堆叠在裸片倒装芯片球栅阵列封装上并且在堆叠封装之间具有引线键合互连
- Patent Title: Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages
- Patent Title (中): 半导体多封装模块具有封装堆叠在裸片倒装芯片球栅阵列封装上并且在堆叠封装之间具有引线键合互连
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Application No.: US12767693Application Date: 2010-04-26
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Publication No.: US07935572B2Publication Date: 2011-05-03
- Inventor: Marcos Karnezos
- Applicant: Marcos Karnezos
- Applicant Address: US CA Fremont
- Assignee: Chippac, Inc.
- Current Assignee: Chippac, Inc.
- Current Assignee Address: US CA Fremont
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/02
Abstract:
A semiconductor multi-package module having stacked second and first packages, each package including a die attached to a substrate, in which the first and second package substrates are interconnected by wire bonding, and in which the first package is a flip chip ball grid array package in a die-up configuration. Also, a method for making a semiconductor multi-package module, by providing a first package including a first package substrate and having a die-up flip chip configuration, affixing a second package including a second package substrate an upper surface of the first package, and forming z-interconnects between the first and second package substrates.
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