Invention Grant
- Patent Title: Semiconductor processing methods
- Patent Title (中): 半导体加工方法
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Application No.: US11168861Application Date: 2005-06-28
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Publication No.: US07935602B2Publication Date: 2011-05-03
- Inventor: Hongmei Wang , Fred D. Fishburn , Janos Fucsko , T. Earl Allen , Richard H. Lane , Robert J. Hanson , Kevin R. Shea
- Applicant: Hongmei Wang , Fred D. Fishburn , Janos Fucsko , T. Earl Allen , Richard H. Lane , Robert J. Hanson , Kevin R. Shea
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/311 ; H01L21/302

Abstract:
The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.
Public/Granted literature
- US20060292787A1 Semiconductor processing methods, and semiconductor constructions Public/Granted day:2006-12-28
Information query
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