Invention Grant
- Patent Title: Transistor manufacture
- Patent Title (中): 晶体管制造
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Application No.: US11911736Application Date: 2006-04-18
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Publication No.: US07935606B2Publication Date: 2011-05-03
- Inventor: Jun Fu
- Applicant: Jun Fu
- Applicant Address: DE
- Assignee: X-Fab Semiconductor Foundries AG
- Current Assignee: X-Fab Semiconductor Foundries AG
- Current Assignee Address: DE
- Agency: Thompson Hine LLP
- Priority: GB0507772.2 20050418
- International Application: PCT/EP2006/061643 WO 20060418
- International Announcement: WO2006/111530 WO 20061026
- Main IPC: H01L21/331
- IPC: H01L21/331 ; H01L21/8222

Abstract:
A method in which an oxide layer is formed on material defining and surrounding an emitter window. The technique comprises depositing a non-conformal oxide layer on the surrounding material and in the emitter window, whereby the thickness of at least a portion of the oxide layer in the emitter window is smaller than the thickness of the oxide layer on the surrounding material outside the emitter window; and removing at least a portion of the oxide layer in the emitter window so as to reveal at least a portion of the bottom of the emitter window whilst permitting at least a portion of the oxide layer to remain on the surrounding material. The technique can be used in the manufacture of a self-aligned epitaxial base BJT (bipolar junction transistor) or SiGe HBT (hetero junction bipolar transistor).
Public/Granted literature
- US20080305602A1 Transistor Manufacture Public/Granted day:2008-12-11
Information query
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