Invention Grant
- Patent Title: Three-dimensional silicon on oxide device isolation
- Patent Title (中): 三维硅上氧化物的隔离
-
Application No.: US10596569Application Date: 2003-12-16
-
Publication No.: US07935613B2Publication Date: 2011-05-03
- Inventor: Levent Gulari
- Applicant: Levent Gulari
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Lisa V. Jaklitsch; Joseph Petrokaitis
- International Application: PCT/US03/40079 WO 20031216
- International Announcement: WO2005/062364 WO 20050707
- Main IPC: H01L21/30
- IPC: H01L21/30
Abstract:
A silicon-on-insulator wafer (10). The SOI wafer (10) comprises a top silicon layer (6), a silicon substrate (4), and an oxide insulator layer (2) disposed across the wafer (10) and between the silicon substrate (4) and the top silicon layer (6). The oxide insulator layer (2) has at least one of a contoured top surface (8a, 8b, 8c, 8d, 8e) and a contoured bottom surface (12e). Also provided are processes for manufacturing such a SOI wafer (10).
Public/Granted literature
- US20100013044A1 THREE-DIMENSIONAL SILICON ON OXIDE DEVICE ISOLATION Public/Granted day:2010-01-21
Information query
IPC分类:
