Invention Grant
US07936014B2 Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation
有权
与具有分离的栅极金属焊盘的钳位二极管集成的功率半导体器件，以避免电压降低
- Patent Title: Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation
- Patent Title (中): 与具有分离的栅极金属焊盘的钳位二极管集成的功率半导体器件，以避免电压降低
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Application No.: US12453630Application Date: 2009-05-18
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Publication No.: US07936014B2Publication Date: 2011-05-03
- Inventor: Fu-Yuan Hsieh
- Applicant: Fu-Yuan Hsieh
- Applicant Address: TW Kaohsiung
- Assignee: Force Mos Technology Co., Ltd.
- Current Assignee: Force Mos Technology Co., Ltd.
- Current Assignee Address: TW Kaohsiung
- Agency: Bacon & Thomas, PLLC
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L31/062
Abstract:
A structure of power semiconductor device integrated with clamp diodes having separated gate metal pad is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon.
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