A semiconductor integrated circuit includes: a ladder resistor; a ROM decoder; and a test circuit. The ladder resistor includes a plurality of resistors series-connected to each other and is supplied with a correction voltage at least one of both ends of the series connection and a plurality of connection points in the series connection to generate a plurality of gradation voltages at the plurality of connection points. The ROM decoder selects one of the plurality of gradation voltages generated by the ladder resistor, based on a supplied data signal. The test circuit measures a leakage current in the ROM decoder. The test circuit includes: a plurality of separation units, and a control unit. The plurality of separation units separates the series connection, which is respectively supplied with different power source voltages at both ends, at a certain portion, when the leakage current is measured. The control unit controls separation of the plurality of separation unit corresponding to the data signal.