Invention Grant
- Patent Title: Power amplifier bias circuit
- Patent Title (中): 功率放大器偏置电路
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Application No.: US12712234Application Date: 2010-02-25
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Publication No.: US07936219B2Publication Date: 2011-05-03
- Inventor: Takayuki Matsuzuka , Kazuya Yamamoto , Atsushi Okamura
- Applicant: Takayuki Matsuzuka , Kazuya Yamamoto , Atsushi Okamura
- Applicant Address: JP Tokyo
- Assignee: Mitsubishi Electric Corporation
- Current Assignee: Mitsubishi Electric Corporation
- Current Assignee Address: JP Tokyo
- Agency: Leydig, Voit & Mayer, Ltd.
- Priority: JP2009-174475 20090727
- Main IPC: H03F3/04
- IPC: H03F3/04

Abstract:
A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
Public/Granted literature
- US20110018639A1 POWER AMPLIFIER BIAS CIRCUIT Public/Granted day:2011-01-27
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