Invention Grant
- Patent Title: Capacitive integrate and fold charge-to-digital converter
- Patent Title (中): 电容集成和折叠电荷数字转换器
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Application No.: US12495794Application Date: 2009-06-30
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Publication No.: US07936299B2Publication Date: 2011-05-03
- Inventor: Oliver Richard Astley , Naresh Kesavan Rao , Feng Chen
- Applicant: Oliver Richard Astley , Naresh Kesavan Rao , Feng Chen
- Applicant Address: US NY Niskayuna
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Niskayuna
- Agent Seema S. Katragadda
- Main IPC: H03M1/12
- IPC: H03M1/12

Abstract:
A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.
Public/Granted literature
- US20100328131A1 Capacitive Integrate and Fold Charge-to-Digital Converter Public/Granted day:2010-12-30
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