Invention Grant
US07936594B2 Semiconductor memory devices having core structures for multi-writing
失效
具有用于多写入的核心结构的半导体存储器件
- Patent Title: Semiconductor memory devices having core structures for multi-writing
- Patent Title (中): 具有用于多写入的核心结构的半导体存储器件
-
Application No.: US12437438Application Date: 2009-05-07
-
Publication No.: US07936594B2Publication Date: 2011-05-03
- Inventor: Joon Min Park , Beak Hyung Cho
- Applicant: Joon Min Park , Beak Hyung Cho
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2008-0043109 20080509
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A semiconductor memory device having an efficient core structure for multi-writing includes a data input/output line, a plurality of memory banks each comprising a plurality of memory cells, a first global bit line and a second global bit line which are shared by the plurality of memory banks, and a first write driver and a second write driver which are connected with the data input/output line and provide a program current to the plurality of memory banks through the first and second global bit lines, respectively. Each memory bank includes a first cell area connected with the first global bit line and a second cell area connected with the second global bit line. In a multi-write mode, the first cell area in a first memory bank among the plurality of memory banks and the second cell area in a second memory bank among the plurality of memory banks are simultaneously selected and data is written to memory cells in the selected first and second cell areas, so that data writing time is reduced under the same conditions as a normal write mode.
Public/Granted literature
- US20090279351A1 SEMICONDUCTOR MEMORY DEVICES AND METHODS HAVING CORE STRUCTURES FOR MULTI-WRITING Public/Granted day:2009-11-12
Information query