Invention Grant
- Patent Title: Semiconductor device using logic chip
- Patent Title (中): 半导体器件采用逻辑芯片
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Application No.: US12190196Application Date: 2008-08-12
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Publication No.: US07937633B2Publication Date: 2011-05-03
- Inventor: Kouji Takasugi , Noriaki Komatsu , Nobutoshi Tsunesada , Kazunori Yamane
- Applicant: Kouji Takasugi , Noriaki Komatsu , Nobutoshi Tsunesada , Kazunori Yamane
- Applicant Address: JP Kanagawa
- Assignee: Reneas Electronics Corporation
- Current Assignee: Reneas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2007-211235 20070814
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
A system-in-package type semiconductor device includes a logic chip; and a memory chip connected with external terminal through the logic chip. The logic chip includes a data holding circuit configured to hold a test data in a test mode, and store the test data supplied through the data input/output terminal in the data holding circuit in response to a test data set command, and writes the test data which has been stored in the data holding circuit in the memory chip in response to the test data write command.
Public/Granted literature
- US20090049349A1 SEMICONDUCTOR DEVICE USING LOGIC CHIP Public/Granted day:2009-02-19
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