Invention Grant
US07937674B2 Method, system, and computer program product for predicting thin film integrity, manufacturability, reliability, and performance in electronic designs
有权
用于预测电子设计中薄膜完整性,可制造性,可靠性和性能的方法,系统和计算机程序产品
- Patent Title: Method, system, and computer program product for predicting thin film integrity, manufacturability, reliability, and performance in electronic designs
- Patent Title (中): 用于预测电子设计中薄膜完整性,可制造性,可靠性和性能的方法,系统和计算机程序产品
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Application No.: US11866386Application Date: 2007-10-02
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Publication No.: US07937674B2Publication Date: 2011-05-03
- Inventor: David White , Louis K. Scheffer
- Applicant: David White , Louis K. Scheffer
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Disclosed is an improved method, system, and computer program product for predicting and improving the integrity, manufacturability, reliability, and performance of an electronic circuit feature based on the stresses or strains of design features of electronic designs. Some embodiments identify the design, the concurrent model(s), design feature physical or electrical parameters or attributes, analyzes the stresses or strains to predict the integrity of the design and determines whether the design meets the design objectives or constraints. Some other embodiments make corrections to the designs or the processes based upon the determination of whether the design meets the design objectives or constraints. Some other embodiments compute the variations of the design features as a result of the stresses or strains and determine their impact on the subsequent processes.
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