Invention Grant
- Patent Title: Via first plus via last technique for IC interconnects
- Patent Title (中): 通过第一个加上通过IC互连的最后技术
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Application No.: US12334433Application Date: 2008-12-12
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Publication No.: US07939926B2Publication Date: 2011-05-10
- Inventor: Kenneth Kaskoun , Shiqun Gu , Bart Swinnen
- Applicant: Kenneth Kaskoun , Shiqun Gu , Bart Swinnen
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michelle Gallardo; Sam Talpalatsky; Jonathan T. Velasco
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A multi-tiered IC device contains a first die including a substrate with a first and second set of vias. The first set of vias extends from one side of the substrate, and the second set of vias extend from an opposite side of the substrate. Both sets of vias are coupled together. The first set of vias are physically smaller than the second set of vias. The first set of vias are produced prior to circuitry on the die, and the second set of vias are produced after circuitry on the die. A second die having a set of interconnects is stacked relative to the first die in which the interconnects couple to the first set of vias.
Public/Granted literature
- US20100148371A1 Via First Plus Via Last Technique for IC Interconnects Public/Granted day:2010-06-17
Information query
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