The semiconductor memory apparatus related to an embodiment of the present invention includes a wiring substrate arranged with a device mounting part and connection pads aligned along one exterior side of the wiring substrate, a plurality of semiconductor memory devices including electrode pads which are arranged along one external side of the wiring substrate, a semiconductor memory device group in which the plurality of semiconductor memory devices are stacked on the device mounting part of the wiring substrate so that pad arrangement sides all face in the same direction, and a controller device including the electrode pads arranged along at least one external side of the wiring substrate, wherein the electrode pads of the plurality of semiconductor memory devices and the electrode pads of the controller device are arranged parallel to an arrangement position of the connection pads of the wiring substrate.