Invention Grant
- Patent Title: Multilayer chip scale package
- Patent Title (中): 多层芯片级封装
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Application No.: US11959260Application Date: 2007-12-18
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Publication No.: US07939940B2Publication Date: 2011-05-10
- Inventor: Jari Hiltunen
- Applicant: Jari Hiltunen
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Lathrop & Gage LLP
- Main IPC: H01L29/72
- IPC: H01L29/72

Abstract:
A resin coated copper foil is used to fabricate a multilayer Chip Scale Package (CSP). A CSP package base has a first electrical routing layer. A resin coated copper foil is hot pressed onto the CSP package base and then patterned to form a second electrical routing layer. Conductive vias are then formed between the electrical routing layers. An Organic Solder Preservative (OSP) is used a surface finish for solder balls of the CSP.
Public/Granted literature
- US20090152720A1 MULTILAYER CHIP SCALE PACKAGE Public/Granted day:2009-06-18
Information query
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