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US07940078B2 Method and apparatus for output driver calibration, and memory devices and system embodying same 有权
用于输出驱动器校准的方法和装置，以及体现其的存储器件和系统

  • Patent Title: Method and apparatus for output driver calibration, and memory devices and system embodying same
  • Patent Title (中): 用于输出驱动器校准的方法和装置，以及体现其的存储器件和系统
  • Application No.: US12498949
    Application Date: 2009-07-07
  • Publication No.: US07940078B2
    Publication Date: 2011-05-10
  • Inventor: Dong Pan
  • Applicant: Dong Pan
  • Applicant Address: US ID Boise
  • Assignee: Micron Technology, Inc.
  • Current Assignee: Micron Technology, Inc.
  • Current Assignee Address: US ID Boise
  • Agency: TraskBritt
  • Main IPC: H03K17/16
  • IPC: H03K17/16 ;  H03K19/003 ;  G11C7/00
Method and apparatus for output driver calibration, and memory devices and system embodying same
Abstract:
A method, system, and output driver calibration circuit determine calibration values for configuring adjustable impedance output drivers. The calibration circuit includes a pull-up calibration circuit configured to generate an averaged pull-up count signal for calibrating p-channel devices in the output driver with the averaged pull-up count signal being an average of a plurality of pull-up count signals. The calibration circuit further includes a pull-down calibration circuit configured to generate an averaged pull-down count signal for calibrating n-channel devices in the output driver with the averaged pull-down count signal being an average of a plurality of pull-down count signals.
Abstract(Chinese):

方法，系统和输出驱动器校准电路确定用于配置可调阻抗输出驱动器的校准值。 校准电路包括上拉校准电路，其被配置为产生用于校准输出驱动器中的p沟道器件的平均上拉计数信号，平均上拉计数信号是多个上拉计数信号的平均值 。 校准电路还包括下拉校准电路，其被配置为产生用于校准输出驱动器中的n沟道器件的平均下拉计数信号，其中平均的下拉计数信号是多个下拉计数的平均值 信号。

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