Invention Grant
- Patent Title: Semiconductor device having multiport memory
- Patent Title (中): 具有多端口存储器的半导体器件
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Application No.: US12144051Application Date: 2008-06-23
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Publication No.: US07940542B2Publication Date: 2011-05-10
- Inventor: Kiyotada Funane , Ken Shibata , Yasuhisa Shimazaki
- Applicant: Kiyotada Funane , Ken Shibata , Yasuhisa Shimazaki
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, P.C.
- Priority: JP2007-226451 20070831
- Main IPC: G11C5/02
- IPC: G11C5/02

Abstract:
A semiconductor device enabling expansion of a noise margin. For example, in a memory area in which each memory cell MC is coupled to a word line WLA for a first port and a word line WLB for a second port, and a plurality of memory cells MC is disposed in a matrix shape, each word line is disposed in the order like WLA0, WLB0, WLB1, WLA1, WLA2, . . . . Further, a pitch d2 between WLA-WLA and between WLB-WLB is made smaller than a pitch d1 between WLA-WLB. As such, the word lines of an identical port are disposed at the pitch d2 on one of both sides of a certain word line as a criterion, while the word lines of different ports are disposed at the pitch d1 on the other. With the above configuration, for example, as compared with a case of alternately disposing WLA and WLB, interference between ports can be reduced even with a small area, and the noise margin can be expanded.
Public/Granted literature
- US20090059640A1 SEMICONDUCTOR DEVICE HAVING MULTIPORT MEMORY Public/Granted day:2009-03-05
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