Invention Grant
- Patent Title: Low power read scheme for read only memory (ROM)
- Patent Title (中): 只读存储器(ROM)的低功耗读取方案
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Application No.: US12488624Application Date: 2009-06-22
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Publication No.: US07940545B2Publication Date: 2011-05-10
- Inventor: Ashish Sharma , Sanjeev Kumar Jain , Manmohan Rana
- Applicant: Ashish Sharma , Sanjeev Kumar Jain , Manmohan Rana
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Priority: IN1516/DEL/2008 20080624
- Main IPC: G11C17/00
- IPC: G11C17/00

Abstract:
A ROM includes a ROM array, an address decoder, a control circuit, a precharge tracker, a precharge circuit, a reference word line, a reference bit line and a reference sense generator. The control circuit generates control signals for reading the ROM. The address decoder enables a bit line and a word line. The precharge tracker generates a programmable precharge signal, which is provided to the precharge circuit for precharging the enabled bit line. A reference word line is enabled based on the programmable precharge signal and the control signals for tracking the enabled word line. A reference bit line is enabled based on the reference word line for tracking the enabled bit line. The reference sense generator generates a programmable sense signal based on the reference bit line, the programmable precharge signal and the control signals for reading a bit cell corresponding to the enabled bit line and word line.
Public/Granted literature
- US20090316464A1 LOW POWER READ SCHEME FOR READ ONLY MEMORY (ROM) Public/Granted day:2009-12-24
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