Invention Grant
US07940552B2 Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
有权
具有预读取操作电阻漂移恢复的多电平单元相变存储器件,采用这种器件的存储器系统以及读取存储器件的方法
- Patent Title: Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
- Patent Title (中): 具有预读取操作电阻漂移恢复的多电平单元相变存储器件,采用这种器件的存储器系统以及读取存储器件的方法
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Application No.: US12079869Application Date: 2008-03-28
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Publication No.: US07940552B2Publication Date: 2011-05-10
- Inventor: Jeong Chang-Wook , Gi-Tae Jeong , Hyeong-Jun Kim , Seung-Pil Ko
- Applicant: Jeong Chang-Wook , Gi-Tae Jeong , Hyeong-Jun Kim , Seung-Pil Ko
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello, LLP
- Priority: KR10-2007-0042046 20070430; KR10-2008-0024517 20080317
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.
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