Invention Grant
- Patent Title: Multi-level nonvolatile semiconductor memory device
- Patent Title (中): 多级非易失性半导体存储器件
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Application No.: US11864074Application Date: 2007-09-28
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Publication No.: US07941588B2Publication Date: 2011-05-10
- Inventor: Hitoshi Shiga
- Applicant: Hitoshi Shiga
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-267012 20060929
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A nonvolatile semiconductor device includes a first flash memory device; a second flash memory device in which data programming and/or reading is faster than in said first flash memory device; an address conversion table which correlates a logical address of a memory cell to a physical address designating said memory cell of said first and/or said second flash memory; an interface part which accepts an access request to a memory cell, an address conversion table search part which searches a physical address an access part which accesses a memory cell a counting part which counts the number of times a physical address has been accessed and generates an access count value of said physical address; a comparison part which compares whether said access count value of said physical address is more than a threshold or not; and a transmitting part which transmits data to said second flash memory device.
Public/Granted literature
- US20080082735A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2008-04-03
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