A simulation system for performing simulation of an operation of a circuit including a particular signal substituting section for making, in the simulation, an output signal of a first flipflop or an input signal of a second flipflop be a particular signal indicating neither high level nor low level during a period which is 1 cycle shorter than a specified clock cycle number of a multicycle path which has been specified in advance; and an output section for outputting information corresponding to whether or not a signal at an output terminal of the second flipflop or at part of the circuit located in a subsequent stage of the output terminal of the second flipflop, which has been specified in advance, is made to be the particular signal.