Invention Grant
- Patent Title: Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate
- Patent Title (中): 在衬底上制造不同半导体材料的共面隔离区域的方法和装置
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Application No.: US12023887Application Date: 2008-01-31
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Publication No.: US07947566B2Publication Date: 2011-05-24
- Inventor: Howard Hao Chen , Louis Lu-Chen Hsu , Jack Allan Mandelman
- Applicant: Howard Hao Chen , Louis Lu-Chen Hsu , Jack Allan Mandelman
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: F. Chau & Associates, LLC
- Agent Brian P. Verminski, Esq.
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A semiconductor processing method includes providing a substrate, forming a plurality of semiconductor layers in the substrate, each of the semiconductor layers being distinct and selected from different groups of semiconductor element types. The semiconductor layers include a first, second, and third semiconductor layers. The method further includes forming a plurality of lateral void gap isolation regions for isolating portions of each of the semiconductor layers from portions of the other semiconductor layers.
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