Invention Grant
- Patent Title: Method for corrosion prevention during planarization
- Patent Title (中): 平面化期间的防腐蚀方法
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Application No.: US12019647Application Date: 2008-01-25
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Publication No.: US07947604B2Publication Date: 2011-05-24
- Inventor: Fan Zhang , Lup San Leong , Yong Kong Siew , Bei Chao Zhang
- Applicant: Fan Zhang , Lup San Leong , Yong Kong Siew , Bei Chao Zhang
- Applicant Address: SG Singapore
- Assignee: Chartered Semiconductor Manufacturing, Ltd.
- Current Assignee: Chartered Semiconductor Manufacturing, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Horizon IP Pte Ltd
- Main IPC: H01L21/302
- IPC: H01L21/302
Abstract:
The present invention relates to the reduction or complete prevention of Cu corrosion during a planarization or polishing process. In one aspect of the invention, RF signal is used to establish a negative bias in front of the wafer surface following polishing to eliminate Cu+ or Cu2+ migrations. In another aspect of the invention, a DC Voltage power supply is used to establish the negative bias.
Public/Granted literature
- US20090191792A1 METHOD FOR CORROSION PREVENTION DURING PLANARIZATION Public/Granted day:2009-07-30
Information query
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