Invention Grant
- Patent Title: Thin film transistor matrix device including a plurality of thin film transistors arranged on the substrate
- Patent Title (中): 薄膜晶体管矩阵器件包括布置在衬底上的多个薄膜晶体管
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Application No.: US12489292Application Date: 2009-06-22
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Publication No.: US07947982B2Publication Date: 2011-05-24
- Inventor: Hidaki Takizawa , Shougo Hayashi , Takeshi Kinjo , Makoto Tachibanaki , Kenji Okamoto
- Applicant: Hidaki Takizawa , Shougo Hayashi , Takeshi Kinjo , Makoto Tachibanaki , Kenji Okamoto
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Greer, Burns & Crain, Ltd.
- Priority: JP7-134400 19950531
- Main IPC: H01L29/04
- IPC: H01L29/04

Abstract:
A thin film transistor matrix device including an insulating substrate, a plurality of thin film transistors (TFTs) on the insulating substrate, and a plurality of picture element electrodes (connected to the TFTs) on the insulating substrate in a matrix to define an image display region. A first conductor is on the insulating substrate. A first insulating film is on the first conductor, a second conductor is on the first insulating film, and a second insulating film is over the first insulating film and the second conductor. A first contact hole is formed in the first and second insulating films, a second contact hole is formed in the second insulating film, and a conducting connection is formed between the first and second contact holes. The first and second conductors are connected to the conducting connection via the first and second contact holes, respectively, which are both outside the image display region.
Public/Granted literature
- US20090256153A1 THIN FILM TRANSISTOR MATRIX DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2009-10-15
Information query
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