Invention Grant
US07948285B2 PLL circuit, radio terminal device and control method of PLL circuit
有权
PLL电路,无线终端设备和PLL电路的控制方法
- Patent Title: PLL circuit, radio terminal device and control method of PLL circuit
- Patent Title (中): PLL电路,无线终端设备和PLL电路的控制方法
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Application No.: US12496065Application Date: 2009-07-01
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Publication No.: US07948285B2Publication Date: 2011-05-24
- Inventor: Shinichiro Tsuda
- Applicant: Shinichiro Tsuda
- Applicant Address: JP Toyko
- Assignee: Sony Corporation
- Current Assignee: Sony Corporation
- Current Assignee Address: JP Toyko
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-191491 20080724
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
There is provided a PLL circuit including a phase comparison unit that compares an accumulated addition value of a division ratio converted into a digital value and that of an oscillating signal from an oscillator controlled by using the digital value in each cycle of a reference frequency, a data conversion unit that has a variable gain amplification unit to change a gain and causes output of the phase comparison unit to converge to an arbitrary setting value, an offset detection unit that detects an offset arising due to a change in gain of the variable gain amplification unit using output of the phase comparison unit, and an offset compensation unit that compensates for the offset detected by the offset detection unit in timing when the gain of the variable gain amplification unit changes.
Public/Granted literature
- US20100019812A1 PLL CIRCUIT, RADIO TERMINAL DEVICE AND CONTROL METHOD OF PLL CIRCUIT Public/Granted day:2010-01-28
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